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ECS 154B COMPUTER ARCHITECTURE (4) I, II, III

Lecture: 3 hours

Discussion: 1 hour

Prerequisites: Course ECS 154A or EEC 170, and course ECS 60

Grading: Letter; two midterms (20% each), final exam (40%) and programming and digital design work (20%)

Catalog Description:
Hardwired and microprogrammed CPU design. Memory hierarchies. Uniprocessor performance analysis under varying program mixes. Introduction to pipelining and multiprocessors.

Expanded Course Description:

  1. Hardwired and Microprogrammed CPU Design
    Internal bus systems. Register transfer languages. Microprogramming. Homework using digital design software to implement part or all of a simple CPU.
  2. Memory Hierarchies
    General idea of multilevel memory systems. Emphasis here is on caches, since virtual memory is covered in courses 154A, 150, 151AB.
  3. Uniprocessor Performance Analysis
    Instruction set profile analyses under varying program mixes. Cost/performance tradeoffs. Introduction to RISC philosophy, and interactions with pipelining, orthogonal instruction sets, etc.
  4. Multiprocessor Speedup
    Introduction to shared-memory and message-passing multiprocessor systems.

Textbooks:
D. Patterson and J. Hennessy, Computer Organization and Design the Hardware/Software Interface, Elsevier HSS, 2004

Computer Usage:
Extensive digital design simulation assignments.

Engineering Design Statement:
Design tradeoffs--hardwired vs. microprogrammed CPU implementation, RISC vs CISC architectural philosophy, and so on--form a continuing theme in the course.

ABET Category Content:
Engineering Science: 2 units
Engineering Design: 2 units

Program Outcomes:
Students will:

Student Outcomes:

Instructors: M. Farrens, N. Matloff

Prepared by: M. Farrens, N. Matloff, R. Olsson (Nov. 1996)

Overlap Statement:
This course does not duplicate any existing course.

5/06

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